Job Description

Located in Santa Clara, CA, we are Semiconductor Startup that is in advanced stages of development working to deliver a processor which combines the functionality of a CPU, TPU, and GPU into one!

We are seeking a Design Verification Engineer who has experience with GPUs or vector processing engine architecture, cache hierarchy and MMU architecture, cache coherency protocols, etc.

This person must reside in CA or NV and be willing to commute to one of our offices in Santa Clara or Las Vegas as needed.

Top Reasons to Work with Us

- Join a well funded startup having an immediate impact day 1 working with breakthrough technology!
- Competitive Base + Stock Options
- Medical, Dental, Vision, 401K
- PTO, Holidays, WFH, and more!

What You Will Be Doing

- Review product designs noting likely points of failure
- Design verification methodology based on product designs and failure points
- Determine test environments and verification tools
- Plan the method of sequence for testing operations
- Institute and tweak testing mechanisms and protocols
- Writing up final test procedures and training QC staff

What You Need for this Position

Required:
- BS in Electrical Engineer, Computer Engineering, Computer Science, or relate
- 4+ years of Design Verification experience
- Very good understanding of Design Verification goals and challenges
- SystemVerilog and UVM
- Processor architecture with understanding of execution pipelines
- GPUs or vector processing engines architecture
- Cache hierarchy and MMU architecture
- Cache coherency protocols & Standard protocols like PCIe and DDR4/5
- Verification environments and tools for architecture and implementation
- Regression infrastructure architecture and implementation
- Verification process and test plan development
- Assertion-based verification using SVA/OVA
- Functional coverage methodology and implementation
- Formal equivalence checking tools like Jasper
- Theorem provers like ACL2

Preferred:
- Debugging complex test scenarios
- FPGA emulated platforms
- Linux environment
- Using git version control system, scripting (Perl or Python), C/C++, TCL and Expect

So if you are a Design Verification Engineer with experience, please apply today!

Applicants must be authorized to work in the U.S.

Preferred Skills

Design Verification

SystemVerilog and UVM

GPUs or vector processing engines architecture

Cache hierarchy and MMU architecture

Cache coherency protocols

Standard protocols like PCIe and DDR4/5

Assertion-based verification using SVA/OVA

Theorem provers like ACL2

FPGA emulated platforms

Linux environment

Job Tags

Holiday work, Full time, Immediate start,

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